The present invention relates generally to an RF amplifier bias compensation apparatus and, more particularly, to a stored program controlled module amplifier bias and amplitude/phase compensation apparatus.
The prior state of the art of amplifier bias and amplitude/phase compensation apparatus is well represented by the prior art apparatus and approaches which are contained in the following U.S. Pat. Nos.:
U.S. Pat. No. 3,900,823 issued to Sokal et al on 19 Aug. 1975; PA1 U.S. Pat. No. 4,554,511 issued to Braun on 19 Nov. 1985; PA1 U.S. Pat. No. 4,794,343 issued to Yang on 27 Dec. 1988; and PA1 U.S. Pat. No. 4,859,964 issued to JOrgensen on 22 Aug. 1989.
The Sokal et al patent is directed to a power amplifying and signal processing system for modulated carrier signals separately processing the amplitude component of the system input signal and the component of frequency or phase, or both frequency and phase, and later recombines the separately processed components to provide an output signal The amplitude and phase transfer functions of the system can be accurately controlled. The input signal is fed to a power amplifier whose output provides the output for the system. The input and output signals of the system are fed by separate paths to a comparator which compares both signals and emits an error signal to a controller. The controller regulates the amplitude and phase, or both, of the power amplifier's output to null the error signal
The Braun patent discloses an offset voltage correction network for an instantaneous floating point amplifier which includes a cascaded amplifier preceded by a sample-and-hold network in normal fashion. Immediately preceding the sample-and-hold network, however, is a summing network to which the input data is applied from the input multiplexer. The summing network also has an analog offset correction voltage applied thereto in such a manner so as to subtract the offset component from the input data as it is applied. This offset voltage is derived from a digital-to-analog device to which a digitally stored value of dc offset is applied.
The Yang patent describes a method for calibrating a parameter of amplifier gain. The parameter of the amplifier gain is responsive to the function of a control signal coupled to the amplifier and is characterized by being determined by at least one functional constant The method comprises the steps of measuring at least one functional constant of the amplifier gain at a corresponding predetermined value of the control signal. The method continues with the step of changing the functional parameter of the amplifier to another predetermined calibrated value according to the measured other functional constant. By reason of this combination of steps, the parameter of the amplifier gain is calibrated to assume the predetermined calibrated value without the use of additional test equipment.
The Jorgensen patent discusses a system for automatically readjusting the gain of an amplifier so that the dynamic range of an input analog signal does not exceed a predetermined digital word length which includes a digitally controlled amplifier. Output of the amplifier is coupled to an analog-to-digital converter. Output of the analog-to-digital converter is coupled to a microprocessor system. A digitized representation of the input signal is stored in the microprocessor system. The microprocessor system then compares amplitude values of the stored digital representation with predetermined upper and lower limit values.
While the above-cited references are instructive, they do not address the implementation and performance features of the present invention.